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Effective foundry partnership Are megafoundries providing ICs at optimal cost?
Many integrated circuits that are being produced in today's semiconductor industry are high-volume ASICs and application-specific standard products. According to Gartner Dataquest, ASICs and ASSPs are expected to dominate industry revenue into the future. Developing an ASIC is a large part of the business plan for many fabless semiconductor companies, especially those that have designed in an expensive FPGA and plan to move into high-volume production before product life cycles dwindle. But the partnerships among large silicon foundries and merchant IC suppliers are creating what could amount to a seller's market--and an increasingly inflexible supply chain--across the semiconductor enterprise. That would pose even greater challenges for system manufacturers that want to differentiate a product within a reasonable cost and time frame. Whether you are developing an ASIC from the beginning or are looking to implement an ASIC-to-ASIC or FPGA-to-ASIC conversion for cost savings, selecting the right foundry partner is paramount to success. The goal of the supply chain model, including the processing of wafers through a foundry, is to deliver product collaboratively in a timely and cost-effective manner. But every year, process geometries shrink while the required device performance and functionality increase, resulting in nonrecurring engineering (NRE) and tooling charges that amount to a step function over the costs in the larger, more-mature process technologies. Further, engineering labor associated with designing in these technology nodes is extremely cost-intensive. The technical difficulties faced in designing, manufacturing, assembling and testing "bleeding edge" technologies only add to product lead time.
Access and technology issues In spite of this, some megafabs have ripped up their nonobsolescence policies and no longer guarantee the longevity of their processes. They have little incentive to accommodate the design support requirements of smaller customers and those that could use mature technologies that allow development and purchase of a more cost-effective ASIC when going to volume production. Additionally, engineering design teams are not always available to support the customer, so proven cost reduction programs that include flexible design options, such as FPGA-to-ASIC or ASIC-to-ASIC conversions, are often not pursued. Essentially, large wafer-manufacturing companies are making technology choices and cost reductions more and more difficult for their customers. Sometimes, they are even excluding customers from access to adequate technology sources and wafer supply. On the other hand, a flexible foundry provider with a global footprint of design, technology and manufacturing resources can provide its customers with lower design costs, decreased turnaround times and greater rev- enue potential. A flexible supplier will allow the customer to supply a design in any format: a completed GDSII (graphic data system) design tape, gate-level FPGA or ASIC netlist, or register transfer level (RTL) netlist that must be verified and routed for placement. A customer with multiple netlists of different programmable devices may even want a supplier to consolidate those files and build one custom, cost-reduced ASIC. That's an easy task for a supplier that has digital design experts on board and that can find a way to consolidate multiple parts, including mixes of FPGAs, ASICs and other logic devices. The resulting multiple-to-one conversions often provide greater reliability and reduced costs by cutting power consumption and the number of devices on the board. Further, an ASIC provides the required gate density with performance characteristics that are the same as or better than those of the FPGA, but without the substantial silicon costs of a large FPGA. Finally, the supplier with design expertise will help the customer decide whether a mature or state-of-the-art technology makes the most sense for the customer's ASIC design.
Design pressure An ASIC can come in at less than half the cost of a large, complex FPGA and can allow the customer to save significant time during the mass-production phase, since the ASIC does not have to be programmed. An ASIC can deliver as much as a tenfold reduction in power consumption over an equivalent FPGA. In addition, if pin-to-pin compatibility is not required, an ASIC allows for a smaller package with the right number of pins, reducing cost and the footprint on the printed-circuit board. The substantial die size savings of an ASIC over a programmable device also results in cost savings that should play into a customer's vendor selection. When using a megafoundry, a multitude of excuses can surface that can make a simple ASIC design or conversion seem too complex. The foundry partner may decide that it does not accept new designs on a mature process that would otherwise be perfect for the ASIC. That forces the OEM to use a more-advanced technology, increasing the NRE cost substantially. A flexible foundry partner, by contrast, will help deal with these issues before the design phase, making a new ASIC design or a conversion a very palatable choice for the customer. The supplier's commitment to a long-term relationship is paramount. An OEM should be confident that it can make long-term product decisions without the concern of process obsolescence. Ideally, suppliers should maintain fabrication processes for up to 10 years or more, and in the event of process obsolescence, the supplier should offer a road map for easy product migration at minimal cost. By partnering with suppliers that provide low-cost, pin-for-pin replacements targeting both current and next-generation products, the foundry partner can offer additional cost reductions and even quicker time-to-market than larger suppliers or wafer foundries that require their customers to use an exclusive list of supply partners. All of this adds up to a new dimension of flexibility for the customer on orders of all sizes and complexity. The rigidity of large foundry suppliers is making it increasingly difficult for OEMs to bring their designs to market. Instead, look for flexible foundry or ASIC partners that offer superior services, including ASIC design, manufac- turing and test, to support the full complement of supply chain requirements.
Mike Andrews is a project marketing manager for AMI Semiconductor Inc.'s structured digital products group. He can be reached at mike_andrews@amis.com.
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